01 · Advanced Circuits
Full gate-by-gate diagrams for QFT, VQE ansätze, and QAOA layers.
02 · Error Correction
Repetition, Shor, and surface codes — diagrammed in full.
03 · Ion & Photonic Hardware
Linear Paul traps, Mølmer–Sørensen gates, and photonic chips.
04 · Benchmarking
Quantum Volume, algorithmic qubits, and cross-vendor data.
05 · Advanced AI Workflow
A full hybrid pipeline case study, end to end.
06 · Roadmap
From NISQ to fault tolerance — milestones & timelines.
Advanced Circuit Diagrams
Part 1 introduced algorithms at the level of “what problem they solve and why.” Here we open the box and look at the actual gate sequences — the circuits you would type into Qiskit, Cirq, or PennyLane — for three of the most important near-term building blocks.
The Quantum Fourier Transform, gate by gate
The 3-qubit QFT below is the literal circuit used inside Shor’s algorithm and quantum phase estimation. Each qubit gets a Hadamard, then receives a sequence of controlled phase rotations Rk = diag(1, e2πi/2ᵏ) from every qubit below it, and a final layer of SWAP gates reverses the qubit order to match the standard output convention.
A hardware-efficient VQE ansatz
Real VQE experiments rarely use a textbook-perfect ansatz; instead they use a “hardware-efficient” pattern — alternating layers of single-qubit rotations and a fixed entangling pattern — chosen to match whatever native gates and connectivity the target chip actually has, trading some theoretical expressivity for much shallower, lower-error circuits.
QAOA: cost and mixer layers on a 3-node graph
For Max-Cut on a triangle graph (every node connected to every other), the cost unitary applies a ZZ-type interaction — implemented as CNOT, RZ(γ), CNOT — across every edge, and the mixer applies an RX(β) rotation to every qubit. One full “p=1” layer is shown; real instances typically stack several layers.
Every gate drawn above is also a source of error on real hardware. A 3-qubit QFT with 1% two-qubit gate error already accumulates several percent total infidelity; a 100-qubit QAOA circuit with several layers can accumulate enough error to wash out the signal entirely without error mitigation — which is precisely why circuit depth, not just qubit count, dominates near-term hardware roadmaps.
Quantum Error Correction & Surface Codes
Physical qubits are noisy. Quantum error correction (QEC) doesn’t make any single physical qubit better — it spreads one “logical” qubit’s information redundantly across many physical qubits so errors can be detected and corrected without ever directly measuring (and thus destroying) the encoded quantum state.
Step one: the classical repetition code, and why it isn’t enough
Classically, you protect a bit by repeating it three times and taking a majority vote. The quantum bit-flip repetition code does something structurally similar for one type of error (X / bit-flip errors) — but it cannot be the whole story, because quantum errors also include continuous phase-flip (Z) errors with no classical analogue.
Two CNOTs spread the logical state across three physical qubits, so a single accidental bit-flip on any one qubit can be detected (and corrected) by comparing them — without ever measuring the logical state directly.
Peter Shor’s 1995 code nests a phase-flip code inside a bit-flip code, using 9 physical qubits to protect against an arbitrary single-qubit error of either type — the first proof that fault-tolerant quantum computation is possible in principle at all, even though 9-to-1 overhead is far from practical.
The surface code: today’s leading practical approach
The surface code arranges physical qubits on a 2D checkerboard lattice: “data” qubits hold the logical information, while interleaved “ancilla” (measurement) qubits repeatedly measure local X-type and Z-type stabilizers — multi-qubit parity checks that reveal whether (and where) an error occurred, without revealing the protected quantum state itself.
Syndrome extraction
Ancilla qubits are repeatedly measured (without touching data qubits directly), producing a “syndrome” bit string that a classical decoder interprets to infer the most likely error pattern.
Code distance
A larger lattice (higher code distance, d) can correct more simultaneous errors, but needs proportionally more physical qubits — roughly d² physical qubits per logical qubit for the surface code.
Threshold theorem
If physical error rates fall below a hardware-dependent threshold (commonly cited around ~1% for the surface code), adding more physical qubits per logical qubit makes the logical error rate exponentially smaller — the mathematical basis for believing large fault-tolerant machines are possible at all.
For decades, every demonstrated logical qubit was worse than a single bare physical qubit — the error-correction overhead introduced more noise than it removed. Recent surface-code experiments from Google Quantum AI and IBM have crossed the so-called “break-even” point: a logical qubit that measurably outperforms its best constituent physical qubit, and whose error rate keeps dropping as the code distance increases.
This is widely regarded as the clearest evidence yet that the threshold theorem’s predictions hold in real hardware, not just in theory — though scaling from a handful of logical qubits to the hundreds of thousands needed for Shor’s algorithm at cryptographic scale remains a multi-year engineering effort.
p = physical error rate, pth = threshold, d = code distance
Trapped-Ion & Photonic Hardware
Part 1 covered the two leading solid-state platforms. The two approaches below trade fabrication simplicity for physics that is, in some ways, even cleaner — atoms and photons are naturally identical to each other in a way no two manufactured circuits ever quite are.
Trapped-ion qubits
Individual ions are confined in a vacuum chamber by oscillating electric fields and laser-cooled until nearly motionless. Each ion’s qubit is encoded in a long-lived internal energy level (often a hyperfine or “optical” transition), addressed by precisely tuned laser pulses. Two-qubit gates exploit the ions’ shared vibrational motion — most commonly the Mølmer–Sørensen gate, which entangles two ions by briefly coupling both to a shared motional mode rather than requiring direct ion-ion contact.
- Strengths: very long coherence times, near-perfect qubit-to-qubit uniformity (every ytterbium ion is identical), high native gate fidelities, all-to-all connectivity within a chain.
- Challenges: gate speeds (microseconds) are slower than superconducting qubits, and scaling beyond tens of ions per trap requires shuttling ions between zones or photonic interconnects between traps.
- Leading systems: Quantinuum’s H-series (consistently topping public Quantum Volume benchmarks), IonQ’s Forte and Tempo systems.
Photonic quantum computing
Photonic processors encode qubits in properties of single photons — polarization, path, or time-bin — and route them through networks of waveguides, beam splitters, and phase shifters etched into a photonic chip. Because photons barely interact with their environment (or each other), photonic qubits suffer essentially no decoherence; the dominant error source instead is photon loss.
- Strengths: operates at room temperature (aside from cryogenic single-photon detectors), naturally compatible with existing fiber-optic networking for a future quantum internet.
- Challenges: generating and detecting single photons efficiently and on-demand is hard; entangling gates between photons are inherently probabilistic without extra resources.
- Leading approach: PsiQuantum’s fusion-based quantum computing architecture builds large entangled “resource states” from many small photonic building blocks fused together, designed from the ground up for fault tolerance at scale.
| Platform | 2-Qubit Gate Fidelity (typical, public) | Connectivity | Main Scaling Bottleneck |
|---|---|---|---|
| Trapped ion | ~99.9%+ on small systems | All-to-all within a trap | Shuttling / interconnecting multiple traps |
| Photonic | Loss-limited rather than fidelity-limited | Reconfigurable via waveguide routing | Deterministic single-photon sources at scale |
| Superconducting (ref.) | ~99–99.9% | Fixed, nearest-neighbor on-chip | Frequency crowding, wiring density |
| Spin qubits (ref.) | ~99%+ in best demonstrations | Nearest-neighbor, improving with shuttling | Device-to-device uniformity at scale |
Figures above are illustrative ranges drawn from publicly reported vendor and academic benchmarks; specific numbers shift quickly as the field advances and should be checked against current vendor disclosures for any decision-critical use.
🧪 Chemistry on trapped ions
Quantinuum has run some of the highest-fidelity VQE chemistry demonstrations to date on its H-series hardware, leveraging trapped-ion gate fidelity to push past what noisier platforms can currently extract reliably.
🌐 Photonic networking
Because photons already travel through existing fiber infrastructure, photonic qubits are the natural carrier for linking distant quantum processors together — a near-term stepping stone toward distributed quantum computing and the quantum internet.
🏭 Fault-tolerant-by-design bets
PsiQuantum has partnered with national labs and announced large-scale data-center-style facilities explicitly aimed at skipping the NISQ era and going straight to a fault-tolerant photonic machine — a notably different strategic bet than the incremental-qubit-count approach.
Benchmarking Quantum Hardware
Raw qubit count makes for an easy headline but a poor benchmark. A 1,000-qubit chip with poor connectivity and high error rates can be less useful than a 50-qubit chip with excellent fidelity. The metrics below try to capture “real” capability.
Quantum Volume (QV)
IBM’s benchmark runs random “square” circuits (equal width and depth) and checks whether the output distribution passes a statistical heavy-output test. QV = 2ⁿ for the largest n a device passes — it jointly rewards qubit count, connectivity, and gate fidelity in one number.
Algorithmic Qubits (#AQ)
IonQ’s benchmark runs a suite of real algorithm-shaped circuits (not random ones) at increasing width and reports the largest size that still produces useful results — intended to track more closely with what an actual application could achieve today.
CLOPS
“Circuit Layer Operations Per Second” measures how fast a device can run many circuits end-to-end (including classical control overhead) — capturing throughput, which matters enormously for any workload that needs thousands of circuit executions, like VQE or QAOA.
Illustrative multi-factor comparison (radar chart)
Illustrative shape, not measured data: superconducting platforms currently lead on raw qubit count and gate speed; trapped-ion platforms lead on fidelity and coherence. Both profiles shift year to year.
“Qubit count” press releases are easy to compare but frequently misleading across platforms with very different error rates and connectivity. When evaluating a real claim, look for the benchmark methodology (QV, #AQ, or a named application-specific test) and whether independent groups have reproduced it — not just the headline qubit number.
An Advanced AI-Quantum Workflow, End to End
Part 1 introduced the hybrid variational loop in the abstract. Here’s what a complete, realistic near-term pipeline looks like — using a quantum kernel to help a classical model predict a molecular property, with error mitigation built in.
A quantum processor computes one specific, potentially hard-to-classically-replicate quantity — the kernel matrix — while every other stage (data handling, error cleanup, the final predictive model) stays classical and well-understood.
Why a quantum kernel, specifically?
A kernel function measures similarity between data points; classical SVMs already use kernels like the RBF kernel for this. A quantum kernel instead encodes each data point into a quantum state via a feature map circuit and measures the overlap between resulting states. For certain hand-crafted datasets, this overlap is provably hard to compute classically — though whether this advantage extends to data that actually arises in real chemistry, finance, or materials problems is still an open, actively researched question, not a settled one.
from qiskit_machine_learning.kernels import FidelityQuantumKernel from qiskit.circuit.library import ZZFeatureMap from sklearn.svm import SVR from mitiq import zne # 1. Build the quantum feature map and kernel feature_map = ZZFeatureMap(feature_dimension=6, reps=2) qkernel = FidelityQuantumKernel(feature_map=feature_map) # 2. Wrap kernel evaluation with zero-noise extrapolation def mitigated_kernel_matrix(X): raw = zne.execute_with_zne(lambda: qkernel.evaluate(x_vec=X)) return raw # 3. Train a classical regressor on the quantum kernel matrix K_train = mitigated_kernel_matrix(X_train) model = SVR(kernel="precomputed") model.fit(K_train, y_train) # y = e.g. binding affinity, formation energy K_test = mitigated_kernel_matrix(X_test) predictions = model.predict(K_test)
🧬 Drug discovery & materials
Pipelines like this are being explored to predict molecular properties — binding affinity, formation energy, reaction barriers — as an assistive signal alongside classical computational chemistry, not yet as a wholesale replacement for it.
💹 Financial risk modeling
The same kernel-based structure has been piloted for credit-risk and fraud-pattern classification tasks, where quantum feature maps are used as one additional, potentially complementary signal alongside classical gradient-boosted models.
As of today, no quantum machine learning pipeline has demonstrated a clear, reproducible advantage over the best classical methods on a genuinely useful, real-world dataset at meaningful scale. The architecture above represents where the field’s serious research effort is concentrated — not a guaranteed current advantage.
Roadmap to Fault-Tolerant Quantum Computing
No one can give you a precise date for fault-tolerant quantum computing — credible experts disagree by years. What’s clearer is the sequence of milestones the field broadly agrees still needs to happen, and roughly where today’s hardware sits along that path.
Cloud access to NISQ hardware across multiple platforms, early surface-code break-even demonstrations, NIST-standardized post-quantum cryptography, and a maturing software stack (Qiskit, Cirq, PennyLane) are all available and improving today.
Whether useful quantum advantage on commercially valuable problems arrives in years or over a decade, and which hardware platform(s) ultimately scale best, are open questions reasonable experts disagree on — be wary of any source claiming certainty either way.
About this guide
Part 2 continues the same evidentiary standard as Part 1: claims are checked against vendor technical documentation (IBM Quantum, Google Quantum AI, IonQ, Quantinuum, PsiQuantum) and peer-reviewed literature, illustrative figures are explicitly labeled as such, and unresolved questions about timelines and platform competition are presented as open rather than smoothed over.