TechSkills of Future

RF & Microwave Engineering

RF & Microwave Engineering — Complete Curriculum
◈ Professional Engineering Skills Curriculum ◈

RF & Microwave
Engineering

A complete technical curriculum of skill Module of thermal noise, nonlinear devices, Smith-chart, signal analysis, distributed systems, digital communications, and millimeter-wave technology.

20Modules
300+Key Concepts
GHzRF-Frequency Range
COM.Applications
📡
Frequency Range
MHz to mmWave (300 GHz)
🔬
Core Focus
Signal integrity & system design
🗞️
Formula & Equ
S-parameters, Smith Chart, dB math
⚙️
Applications
5G, Radar, Satellite, IoT
🧫
Lab Equipment
VNA, Spectrum Analyzer, Oscilloscope
🔍
01
Introduction to the Exciting World of RF and Microwave Engineering
OverviewFundamentalsApplications Intro
click👈🏼▾
💡Key Concepts
  • RF spectrum: 3 kHz – 300 GHz frequency range
  • Microwave band: 300 MHz – 300 GHz
  • Wavelength shrinks — transmission-line effects dominate
  • Lumped vs distributed circuit elements
  • dB, dBm, dBW — power ratios in logarithmic scale
  • Complex impedance: Z = R + jX
📊Frequency Spectrum
FREQUENCY → HF/VHF UHF SHF EHF mmWave 30MHz 300MHz 3GHz 30GHz 300GHz Applications: WiFi · 5G · IOT ·AI · Radar · Satellite · Bluetooth · GPS
🏗RF System Block Diagram
ANT LNA BPF MIXER IF AMP ADC DSP LOCAL OSC (LO)
🎯Design Guidelines
  1. Always work in dB — power ratios simplify cascade analysis
  2. Identify wavelength vs component size ratio early
  3. Know your target frequency band before selecting topology
  4. Model parasitic inductance and capacitance at RF frequencies
  5. Ground planes are critical — use solid GND fill
🔧Implementation Tips
  1. Use RF-grade PCB material (Rogers 4003, 4350)
  2. Keep RF traces short and matched to 50 Ω
  3. Use coaxial connectors with matched impedance
  4. Shield sensitive circuits from interference
  5. Apply EM simulation (ADS, HFSS) before prototyping
02
Thermal Noise, SNR and Noise Figure (1)
NoiseSNRNFIntermediate
💡 Key Concepts
  • Thermal (Johnson-Nyquist) noise: agitation of electrons
  • Noise power: P = kTB (Watts)
  • k = 1.38 × 10⁻²³ J/K (Boltzmann constant)
  • SNR = Signal Power / Noise Power
  • Noise Figure: NF = SNR_in / SNR_out (dB)
  • Noise temperature: T_e = (NF−1)×290 K
📐 Formulas
Thermal Noise Power
P_noise = k · T · B

Noise Figure (dB)
NF = 10·log₁₀(SNR_in / SNR_out)

At T=290K, B=1Hz
P = -174 dBm/Hz
📈 Noise Spectrum Visualization
FREQUENCY (Hz) NOISE POWER kTB SIGNAL SNR DC 100MHz 1GHz 10GHz
🎯 Design Guidelines
  1. Minimize system bandwidth B to reduce integrated noise
  2. Reduce physical temperature of critical components
  3. Place lowest-NF component first in signal chain
  4. Match source impedance for minimum noise figure
  5. Use shielding to avoid adding external noise
🔧 Improvements
  1. Cryogenic cooling for ultra-low noise (space/radio astronomy)
  2. Select transistors with low noise temperature
  3. Optimize DC bias point for minimum NF
  4. Use balanced (differential) topology to reject common-mode noise
  5. MMIC integration reduces parasitic noise paths
03
Thermal Noise, SNR and Noise Figure (2) — Cascaded Systems
FriisCascadeNoise ChainIntermediate
💡 Key Concepts
  • Friis noise formula for cascaded stages
  • First stage dominates overall NF if gain is high
  • Noise factor F = (F₁−1) + (F₂−1)/G₁ + …
  • Gain-bandwidth product considerations
  • Noise figure measurement techniques (Y-factor method)
📐 Friis Formula
Cascaded Noise Factor
F_total = F₁ + (F₂-1)/G₁
          + (F₃-1)/(G₁·G₂)
          + …

Y-Factor Method
Y = P_hot / P_cold
NF = ENR – 10·log₁₀(Y-1)
🏗 Cascaded Noise Chain Diagram
LNA G₁=20dB NF₁=1dB MIXER G₂=-6dB NF₂=6dB IF AMP G₃=30dB NF₃=3dB FILTER G₄=-3dB NF₄=3dB OUT ↑ Dominates NF
🎯 Design Guidelines
  1. Always put the LNA as the first active element
  2. Maximize gain of first stage to suppress later stages
  3. Minimize cable/filter loss before first amplifier
  4. Budget NF at system level before component selection
🔧 Implementation
  1. Use spreadsheet cascade analysis (NF, gain, IP3 budget)
  2. Measure NF with noise source + spectrum analyzer
  3. Account for connector/cable loss in cascade model
  4. Simulate in ADS or Keysight SystemVue
04
Non-Linear Device Characterization (1) — 1dB Compression & IP3
P1dBIP3HarmonicsIntermediate
💡 Key Concepts
  • Real devices: nonlinear transfer function
  • 1dB Compression Point (P1dB): gain drops 1 dB
  • Third-order intermodulation (IM3) products
  • Input IP3 (IIP3) and Output IP3 (OIP3)
  • Harmonic distortion: 2f, 3f, 4f…
  • Two-tone test: f₁, f₂ → 2f₁-f₂, 2f₂-f₁
📐 Key Formulas
Power Series
y(t) = a₁x + a₂x² + a₃x³

IIP3 (approx)
IIP3 ≈ P1dB + 10 dBm

OIP3 vs IIP3
OIP3 = IIP3 + Gain(dB)
📈 P1dB & IP3 Graph
INPUT POWER (dBm) OUTPUT POWER (dBm) Linear (ideal) Fundamental IM3 P1dB IP3 1dB compression
🎯 Design Guidelines
  1. Keep input signal power < P1dB − 10 dB for linear operation
  2. Target IIP3 ≥ max signal − 10 dBm for low distortion
  3. Avoid signal compression in early stages of RX chain
  4. Use back-off to maintain linearity at high power
🔧 Measurement
  1. Two-tone test: inject f₁ & f₂ spaced by 1–2 MHz
  2. Measure IM3 products at 2f₁−f₂ on spectrum analyzer
  3. P1dB: sweep input power, find 1 dB gain compression
  4. Extrapolate IM3 line to find IP3 intercept
05
Non-Linear Device Characterization (2) — Dynamic Range
SFDRDynamic RangeCompressionAdvanced
💡 Key Concepts
  • Spurious-Free Dynamic Range (SFDR)
  • Instantaneous Dynamic Range (IDR)
  • Dynamic range limited by noise floor AND distortion
  • AM-AM and AM-PM conversion effects
  • Gain compression in LNA, mixer, ADC
📐 SFDR Formula
SFDR (dB)
SFDR = (2/3)(IIP3 – NF – 10·log(kTB))

Dynamic Range Window
DR = P1dB – Noise Floor (dB)

Cascaded IIP3
1/IIP3_tot = 1/IIP3₁ + G₁/IIP3₂ …
🎯 Design Guidelines
  1. SFDR maximized by minimizing NF and maximizing IIP3
  2. Choose ADC with sufficient ENOB for desired SFDR
  3. Use AGC (Automatic Gain Control) to extend dynamic range
  4. Limit in-band interferers with pre-select filtering
🔧 Improvements
  1. Feedforward linearization to cancel distortion products
  2. Predistortion (digital/analog) in transmitter chain
  3. Envelope tracking for PA efficiency vs linearity
  4. Delta-sigma ADC for high DR narrowband signals
06
RF and Microwave Mixers and Spur Charts
MixersSpursHeterodyneIntermediate
💡 Key Concepts
  • Mixer: frequency translation device (up/down convert)
  • Products: m·fRF ± n·fLO (spurious responses)
  • IF = |fRF − fLO| (desired downconversion)
  • Single-balanced vs Double-balanced vs Triple-balanced
  • Image frequency: f_image = fLO + IF
  • Conversion loss, LO-to-RF isolation
🔄 Mixer Diagram
RF LO IF BPF IF = fRF − fLO Spurs: m·fRF ± n·fLO
🎯 Design Guidelines
  1. Use spur chart to identify problematic m/n products
  2. Double-balanced mixer: suppresses even-order spurs
  3. High LO drive level improves conversion loss and IP3
  4. Use image-reject filter before mixer input
  5. Select IF away from strong spur crossings
🔧 Improvements
  1. Image rejection mixer (IRM): Hartley or Weaver topology
  2. Sub-harmonic mixer for mmWave (LO at f/2)
  3. Direct-conversion (zero-IF) avoids image problem
  4. Digital spur cancellation in baseband
07
Standard Test Equipment (1) — Spectrum Analyzer & RF Signal Generators
Spectrum AnalyzerSignal GenLabIntermediate
💡 Key Concepts
  • Spectrum analyzer: frequency-domain power display
  • Resolution Bandwidth (RBW) and Video Bandwidth (VBW)
  • Noise floor: DANL (Displayed Average Noise Level)
  • Span, center frequency, sweep time settings
  • Signal generator: CW, swept, modulated output
  • Output flatness, phase noise, harmonics spec
📊 Spectrum Display
DANL fc 2fc 3fc START CENTER STOP RBW
🎯 Design Guidelines
  1. Set RBW 1/100 of span for good resolution
  2. Use VBW ≤ RBW to smooth noisy signals
  3. Set ref level just above strongest expected signal
  4. Use max hold to capture intermittent signals
  5. Always check input attenuation — overload ruins measurements
🔧 Measurement Tips
  1. Warm up equipment ≥30 min before precision measurements
  2. Use external calibrated attenuator to extend input range
  3. Enable preamplifier for low-signal sensitivity
  4. Normalize signal generator output for flatness compensation
08
Distributed Systems and Impedance Matching Techniques (1) — Transmission Lines
Transmission LineSmith ChartVSWRIntermediate
💡 Key Concepts
  • Transmission line: voltage & current waves travelling along conductor
  • Characteristic impedance Z₀ = √(L’/C’)
  • Reflection coefficient Γ = (ZL−Z₀)/(ZL+Z₀)
  • VSWR = (1+|Γ|)/(1−|Γ|)
  • Standing wave pattern — maxima and minima
  • Quarter-wave transformer for impedance matching
📐 Key Formulas
Characteristic Impedance
Z₀ = √(L’/C’) = 50 Ω (standard)

Reflection Coefficient
Γ = (ZL − Z₀) / (ZL + Z₀)

Return Loss (dB)
RL = -20·log₁₀|Γ|
🗺 Smith Chart Concept
SC (0) OC (∞) Z₀=50Ω ZL Smith Chart: Circles = const R Arcs = const X Center = 50Ω match
🎯 Design Guidelines
  1. Match all interfaces to 50 Ω for maximum power transfer
  2. VSWR < 1.5:1 is acceptable in most systems
  3. Use λ/4 transformer for narrow-band impedance matching
  4. Via placement critical — keep return current paths short
🔧 Implementation
  1. Microstrip: easy to fabricate, dominant planar technology
  2. Calculate trace width for target Z₀ using PCB calculators
  3. Stripline offers better shielding vs microstrip
  4. Use electromagnetic simulation for critical traces
09
Distributed Systems and Impedance Matching Techniques (2) — Matching Networks
L-NetworkStub MatchingBroadbandAdvanced
💡 Key Concepts
  • L, T, π matching networks for impedance transformation
  • Single-stub tuning using Smith chart
  • Double-stub tuning for wider bandwidth
  • Balun: balanced to unbalanced transformer
  • Broadband matching: multi-section Chebyshev transformer
📐 L-Network
Z_S jX_s jB_p Z_L L-Network: 2 elements, narrow-band match
🎯 Design Guidelines
  1. Q factor of L-network determines bandwidth limitation
  2. Use π or T networks for higher Q or wider band
  3. For broadband: cascaded stepped-impedance sections
  4. Always verify match with VNA after fabrication
🔧 Implementation
  1. Use impedance matching simulation tools (ADS, Qucs)
  2. Realize L/C with microstrip stubs at high frequencies
  3. Measure S11 with VNA; target |S11| < −15 dB
  4. PCB tolerance sensitivity analysis: check match vs component variation
10
Passive RF Devices and Basic Building Blocks
CouplersFiltersPower DividersIntermediate
💡 Key Concepts
  • Attenuators: fixed, step, electronically controlled
  • Directional couplers: sample forward/reverse power
  • Power dividers (Wilkinson): equal split with isolation
  • Filters: LPF, HPF, BPF, BSF — Butterworth, Chebyshev
  • Phase shifters: fixed and electronically tunable
  • Circulators and isolators: non-reciprocal devices
🏗 Wilkinson Divider
P_in λ/4, Z=70.7Ω λ/4, Z=70.7Ω 100Ω P/2 P/2
🎯 Design Guidelines
  1. Choose filter response type (Butterworth=flat, Chebyshev=steeper roll-off)
  2. Directional coupler coupling factor: 10–30 dB typical
  3. Circulator: use for diplexing TX/RX on single antenna
  4. Attenuator before sensitive inputs prevents overload
🔧 Improvements
  1. MEMS filters: high Q, tunable, low loss at mmWave
  2. BAW/SAW filters for mobile handsets — compact size
  3. Substrate Integrated Waveguide (SIW) for low-loss passive devices
  4. 3D-printed RF structures for rapid prototyping
11
Standard Test Equipment (2) — Network Analysis, Power Meters, Cable & Connector Care
VNAS-ParametersPower MeterIntermediate
💡 Key Concepts
  • Vector Network Analyzer (VNA): measures S-parameters
  • S11 = input reflection, S21 = forward transmission
  • Calibration SOLT: Short, Open, Load, Thru
  • Power meter: accurate absolute power readings
  • Connector care: torque wrench, inspection, cleaning
  • SMA, 2.92mm (K), 2.4mm, 1.85mm connector families
📊 S-Parameter Matrix
2-Port S-Matrix
[b₁] [S11 S12] [a₁]
[b₂] = [S21 S22] [a₂]

S11: Input return loss
S21: Forward gain/loss
S12: Reverse isolation
S22: Output match
🎯 VNA Best Practices
  1. Always calibrate at the measurement reference plane
  2. Use phase-stable cables rated to calibration frequency
  3. Apply proper torque to SMA connectors (5 in-lb)
  4. Visually inspect connectors before every measurement
  5. Time-domain gating isolates specific reflections
🔧 Implementation
  1. Use port extension to shift ref plane past fixture
  2. Multiport VNA for antenna array characterization
  3. On-wafer probing for MMIC characterization at wafer level
  4. Include connector loss in de-embedding procedure
12
Signal Sources, PLL Synthesizers and Phase Noise
PLLVCOPhase NoiseAdvanced
💡 Key Concepts
  • Phase-Locked Loop (PLL): feedback frequency control
  • VCO: voltage-controlled oscillator K_vco (Hz/V)
  • Phase noise: L(f) in dBc/Hz at offset frequency
  • Leeson’s model: 1/f³, 1/f², flat noise regions
  • Reference oscillator, frequency divider N, loop filter
  • Fractional-N PLL for fine frequency resolution
🔄 PLL Block Diagram
REF OSC PD LF VCO f_out ÷N f_out = N × f_ref
🎯 Design Guidelines
  1. Loop bandwidth controls phase noise: inside BW = ref noise, outside = VCO noise
  2. Optimal loop BW = crossover of ref & VCO noise curves
  3. Use low-phase-noise reference crystal oscillator (TCXO/OCXO)
  4. High Q resonator in VCO improves close-in phase noise
🔧 Improvements
  1. Two-point modulation for low phase noise wideband FM
  2. Sub-sampling PLL eliminates divider noise
  3. Digital PLL (ADPLL) enables fine frequency resolution
  4. Spread-spectrum modulation to reduce EMI from clock
13
Digital Wireless Communications and Vector Signal Analysis (1)
ModulationIQConstellationIntermediate
💡 Key Concepts
  • Digital modulations: BPSK, QPSK, 16-QAM, 64-QAM, 256-QAM
  • IQ (In-phase/Quadrature) representation
  • Constellation diagram: amplitude + phase encoded
  • Error Vector Magnitude (EVM): quality metric
  • Bandwidth efficiency: bits/sec/Hz
  • OFDM: orthogonal subcarriers — LTE, WiFi, 5G
📊 QAM Constellation
I Q 16-QAM: 4 bits/symbol
🎯 Design Guidelines
  1. Higher-order QAM (256-QAM) requires better SNR and EVM
  2. EVM < −30 dBc required for 64-QAM operation
  3. IQ imbalance causes constellation rotation and spreading
  4. Phase noise broadens constellation points — limit close-in noise
🔧 Implementation
  1. Use VSA software (89600) for constellation analysis
  2. Apply digital pre-distortion (DPD) in transmitter
  3. Implement IQ calibration to fix gain/phase imbalance
  4. Select modulation order based on link budget SNR
14
Digital Wireless Communications and Vector Signal Analysis (2) — OFDM & Link Budget
OFDMLink Budget5G NRAdvanced
💡 Key Concepts
  • OFDM: inverse FFT creates orthogonal subcarriers
  • Cyclic prefix (CP) guards against multipath ISI
  • PAPR: peak-to-average power ratio (challenge for PA)
  • Link budget: TX power, path loss, antenna gain, SNR
  • Friis transmission equation: free-space path loss
📐 Link Budget
Received Power
P_rx = P_tx + G_tx − FSPL + G_rx

Free-Space Path Loss
FSPL = 20·log(d) + 20·log(f) + 20·log(4π/c)

Link Margin
LM = P_rx − (NF + kTB + SNR_req)
🎯 Design Guidelines
  1. Close link budget before hardware build — saves redesign cost
  2. PAPR of OFDM requires PA with 8–12 dB back-off
  3. Use subcarrier spacing matched to Doppler spread
  4. Schedule wider CP for high delay-spread environments
🔧 Improvements
  1. Crest Factor Reduction (CFR) to manage PAPR in OFDM
  2. Massive MIMO beamforming: compensates path loss
  3. Channel estimation: pilot symbols for phase correction
  4. Adaptive modulation: switch QAM order with channel conditions
15
RF and IF Sampling by RF ADCs (1) — Nyquist & Aliasing
ADCNyquistAliasingIntermediate
💡 Key Concepts
  • Nyquist theorem: f_s ≥ 2·f_max (baseband)
  • Bandpass sampling: alias into 1st Nyquist zone intentionally
  • ENOB: effective number of bits (SNR/noise performance)
  • SFDR, SINAD, THD for ADC quality metrics
  • Clock jitter degrades SNR at high frequencies
📐 Sampling Theory
Nyquist Criterion
f_s ≥ 2 · f_max

ADC SNR (ideal N-bit)
SNR = 6.02·N + 1.76 dB

ENOB from SINAD
ENOB = (SINAD − 1.76) / 6.02
🎯 Design Guidelines
  1. Bandpass sample RF signals to eliminate downconverter hardware
  2. Use anti-aliasing filter with flat group delay before ADC
  3. Clock jitter budget: σ_jitter < 1/(2π·f·SNR_dB)
  4. Drive ADC input at optimal power level — check data sheet
🔧 Improvements
  1. Interleaved ADC arrays for higher effective sample rate
  2. Delta-sigma ADC: high resolution for narrowband signals
  3. Time interleaving correction DSP: compensate offset/gain/timing errors
  4. RF-class ADCs: 12–16 GS/s sample rate (TI ADC12DJ5200RF)
16
RF and IF Sampling by RF ADCs (2) — Direct RF Digitization
Direct RFGSPS ADCDDCAdvanced
💡 Key Concepts
  • GSPS ADCs directly sample GHz-range signals
  • Digital downconversion (DDC) on FPGA/ASIC
  • Decimation filtering: reduce sample rate after DDC
  • Multi-band reception with single converter chip
  • RF-to-bits software-defined radio (SDR) architecture
🏗 Direct RF Architecture
TRADITIONAL: LNA MIX IF ADC DIRECT RF (modern): LNA RF ADC FPGA/DSP BITS
🎯 Design Guidelines
  1. RF ADC SNR degrades 20 dB/decade with input frequency
  2. External balun to drive differential ADC input
  3. Low-jitter clock distribution critical (<50 fs)
  4. DDC NCO frequency plan: avoid DC offsets and LO leakage
🔧 Improvements
  1. Dithering: add small noise to break ADC nonlinearity patterns
  2. Calibrate ADC spur tones with LUT-based correction
  3. Polyphase filter banks for simultaneous multi-band tuning
  4. RFSoC: RF ADC/DAC + FPGA in single chip (Xilinx)
17
Transmitter and Receiver System Architectures
SuperheterodyneDirect ConversionTX/RXAdvanced
💡 Key Concepts
  • Superheterodyne: classic IF-based architecture
  • Direct conversion (zero-IF): no IF stage, I/Q demodulation
  • Low-IF architecture: small non-zero IF for image rejection
  • Wideband receiver: direct RF sampling approach
  • PA efficiency: Class A, AB, D, E, F topologies
  • Duplexer/diplexer for simultaneous TX/RX
🏗 Architecture Comparison
Superhet Image Rej.
90%
Direct Conv. Simplicity
High
Direct RF DR
Evolving
Zero-IF DC Offset
Problem
🎯 Design Guidelines
  1. Superheterodyne: best selectivity, more complex hardware
  2. Direct conversion: excellent for IC integration (cellular chips)
  3. Always plan for DC offset calibration in zero-IF designs
  4. PA back-off tradeoff: efficiency vs. linearity (EER/ET solutions)
  5. Duplexer isolation: ≥50 dB to protect LNA from TX power
🔧 Improvements
  1. Configurable RF front-end chips (e.g., Qualcomm RF360)
  2. Envelope tracking PA: 3–5 dB efficiency gain
  3. Digital self-interference cancellation for full-duplex
  4. Cognitive radio: sense and adapt to spectrum dynamically
18
Antenna Concepts and the Wireless Channel
AntennaRadiation PatternMIMOIntermediate
💡 Key Concepts
  • Antenna gain, directivity, efficiency
  • Radiation pattern: main lobe, side lobes, null
  • Dipole, patch, horn, Yagi, phased array
  • Polarization: linear, circular, elliptical
  • Wireless channel: fading, multipath, Doppler
  • MIMO: multiple input/output spatial multiplexing
📡 Radiation Pattern
90° 180° 270° Gain: 8 dBi
🎯 Design Guidelines
  1. Match antenna impedance to 50 Ω (S11 < −10 dB minimum)
  2. Half-wave dipole: 2.15 dBi gain, omnidirectional
  3. MIMO requires spatial separation ≥ λ/2 between elements
  4. Ground plane size affects radiation pattern of patch antenna
  5. SAR compliance: check near-body radiation levels
🔧 Improvements
  1. Beam-forming arrays: digital/analog beamforming for 5G
  2. Reconfigurable antennas: tune resonant frequency electronically
  3. Metasurface antennas: intelligent reflecting surfaces (IRS)
  4. ML-based channel estimation for massive MIMO
19
Moving Up to Millimetre Waves (mmWave)
mmWave5G FR260 GHzAdvanced
💡 Key Concepts
  • mmWave: 30–300 GHz (wavelength 1–10 mm)
  • High path loss: rain, atmospheric, and oxygen absorption
  • High bandwidth: multi-GHz channels available
  • 5G NR FR2: 24.25–52.6 GHz bands
  • 60 GHz WiGig (802.11ad/ay): 7 GHz unlicensed band
  • Challenges: skin effect, substrate loss, packaging
📊 mmWave Atmospheric Absorption
FREQUENCY (GHz) LOSS (dB/km) O₂ 60 GHz H₂O 183 GHz 30 60 100 183 300
🎯 Design Guidelines
  1. Use 60 GHz for short-range, high-bandwidth: indoor only
  2. Package parasitics dominate — use flip-chip or WLP packaging
  3. Substrate: low-loss Si, GaAs, InP, SiGe BiCMOS at mmWave
  4. Avoid oxygen absorption window (60 GHz) for long links
  5. Beam-steering arrays are essential to overcome path loss
🔧 Improvements
  1. Phased-array-in-package (AiP): compact 5G modules
  2. On-chip antenna integration in SiGe/CMOS at 60 GHz
  3. GaN-on-SiC for high-power mmWave PA (radar, satellite)
  4. Sub-THz (100–300 GHz): future 6G research frontier
20
Concluding Exercise — Complete Receiver System Design
CapstoneSystem DesignFull Design FlowCapstone
🏆 End-to-End Receiver Design Process
SPEC Define Reqmts LINK Budget Analysis ARCH Select RX Topology CASCADE NF/IP3/ Gain DESIGN PCB/MMIC Layout SIM ADS/HFSS Verify MEASURE VNA/SA Validate
💡 Design Checklist
  • ✅ Define frequency band, sensitivity, and dynamic range
  • ✅ Complete cascade NF and IP3 budget spreadsheet
  • ✅ Select RF architecture (superhet / direct conversion)
  • ✅ Choose all active components (LNA, Mixer, VGA, ADC)
  • ✅ Design impedance matching networks at each interface
  • ✅ Lay out PCB with proper RF grounding and shielding
  • ✅ Simulate S-parameters and noise figure
  • ✅ Measure NF, P1dB, IIP3 with lab instruments
🎯 Performance Targets
Noise Figure
<3 dB
IIP3
−5 dBm
SFDR
70 dB
Return Loss S11
<−15 dB
Gain
30–40 dB

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