◈ Professional Engineering Skills Curriculum ◈
RF & Microwave
Engineering
A complete technical curriculum of skill Module of thermal noise, nonlinear devices, Smith-chart, signal analysis, distributed systems, digital communications, and millimeter-wave technology.
20Modules
300+Key Concepts
GHzRF-Frequency Range
COM.Applications
Fundamentals
01
Introduction to the Exciting World of RF and Microwave Engineering
Key Concepts
- RF spectrum: 3 kHz – 300 GHz frequency range
- Microwave band: 300 MHz – 300 GHz
- Wavelength shrinks — transmission-line effects dominate
- Lumped vs distributed circuit elements
- dB, dBm, dBW — power ratios in logarithmic scale
- Complex impedance: Z = R + jX
Frequency Spectrum
RF System Block Diagram
Design Guidelines
- Always work in dB — power ratios simplify cascade analysis
- Identify wavelength vs component size ratio early
- Know your target frequency band before selecting topology
- Model parasitic inductance and capacitance at RF frequencies
- Ground planes are critical — use solid GND fill
Implementation Tips
- Use RF-grade PCB material (Rogers 4003, 4350)
- Keep RF traces short and matched to 50 Ω
- Use coaxial connectors with matched impedance
- Shield sensitive circuits from interference
- Apply EM simulation (ADS, HFSS) before prototyping
Noise Analysis
02
Thermal Noise, SNR and Noise Figure (1)
💡 Key Concepts
- Thermal (Johnson-Nyquist) noise: agitation of electrons
- Noise power: P = kTB (Watts)
- k = 1.38 × 10⁻²³ J/K (Boltzmann constant)
- SNR = Signal Power / Noise Power
- Noise Figure: NF = SNR_in / SNR_out (dB)
- Noise temperature: T_e = (NF−1)×290 K
📐 Formulas
Thermal Noise Power
P_noise = k · T · BNoise Figure (dB)
NF = 10·log₁₀(SNR_in / SNR_out)At T=290K, B=1Hz
P = -174 dBm/Hz
📈 Noise Spectrum Visualization
🎯 Design Guidelines
- Minimize system bandwidth B to reduce integrated noise
- Reduce physical temperature of critical components
- Place lowest-NF component first in signal chain
- Match source impedance for minimum noise figure
- Use shielding to avoid adding external noise
🔧 Improvements
- Cryogenic cooling for ultra-low noise (space/radio astronomy)
- Select transistors with low noise temperature
- Optimize DC bias point for minimum NF
- Use balanced (differential) topology to reject common-mode noise
- MMIC integration reduces parasitic noise paths
03
Thermal Noise, SNR and Noise Figure (2) — Cascaded Systems
💡 Key Concepts
- Friis noise formula for cascaded stages
- First stage dominates overall NF if gain is high
- Noise factor F = (F₁−1) + (F₂−1)/G₁ + …
- Gain-bandwidth product considerations
- Noise figure measurement techniques (Y-factor method)
📐 Friis Formula
Cascaded Noise Factor
F_total = F₁ + (F₂-1)/G₁+ (F₃-1)/(G₁·G₂)
+ …
Y-Factor Method
Y = P_hot / P_coldNF = ENR – 10·log₁₀(Y-1)
🏗 Cascaded Noise Chain Diagram
🎯 Design Guidelines
- Always put the LNA as the first active element
- Maximize gain of first stage to suppress later stages
- Minimize cable/filter loss before first amplifier
- Budget NF at system level before component selection
🔧 Implementation
- Use spreadsheet cascade analysis (NF, gain, IP3 budget)
- Measure NF with noise source + spectrum analyzer
- Account for connector/cable loss in cascade model
- Simulate in ADS or Keysight SystemVue
Nonlinearity & Dynamic Range
04
Non-Linear Device Characterization (1) — 1dB Compression & IP3
💡 Key Concepts
- Real devices: nonlinear transfer function
- 1dB Compression Point (P1dB): gain drops 1 dB
- Third-order intermodulation (IM3) products
- Input IP3 (IIP3) and Output IP3 (OIP3)
- Harmonic distortion: 2f, 3f, 4f…
- Two-tone test: f₁, f₂ → 2f₁-f₂, 2f₂-f₁
📐 Key Formulas
Power Series
y(t) = a₁x + a₂x² + a₃x³IIP3 (approx)
IIP3 ≈ P1dB + 10 dBmOIP3 vs IIP3
OIP3 = IIP3 + Gain(dB)
📈 P1dB & IP3 Graph
🎯 Design Guidelines
- Keep input signal power < P1dB − 10 dB for linear operation
- Target IIP3 ≥ max signal − 10 dBm for low distortion
- Avoid signal compression in early stages of RX chain
- Use back-off to maintain linearity at high power
🔧 Measurement
- Two-tone test: inject f₁ & f₂ spaced by 1–2 MHz
- Measure IM3 products at 2f₁−f₂ on spectrum analyzer
- P1dB: sweep input power, find 1 dB gain compression
- Extrapolate IM3 line to find IP3 intercept
05
Non-Linear Device Characterization (2) — Dynamic Range
💡 Key Concepts
- Spurious-Free Dynamic Range (SFDR)
- Instantaneous Dynamic Range (IDR)
- Dynamic range limited by noise floor AND distortion
- AM-AM and AM-PM conversion effects
- Gain compression in LNA, mixer, ADC
📐 SFDR Formula
SFDR (dB)
SFDR = (2/3)(IIP3 – NF – 10·log(kTB))Dynamic Range Window
DR = P1dB – Noise Floor (dB)Cascaded IIP3
1/IIP3_tot = 1/IIP3₁ + G₁/IIP3₂ …
🎯 Design Guidelines
- SFDR maximized by minimizing NF and maximizing IIP3
- Choose ADC with sufficient ENOB for desired SFDR
- Use AGC (Automatic Gain Control) to extend dynamic range
- Limit in-band interferers with pre-select filtering
🔧 Improvements
- Feedforward linearization to cancel distortion products
- Predistortion (digital/analog) in transmitter chain
- Envelope tracking for PA efficiency vs linearity
- Delta-sigma ADC for high DR narrowband signals
Mixing & Signal Generation
06
RF and Microwave Mixers and Spur Charts
💡 Key Concepts
- Mixer: frequency translation device (up/down convert)
- Products: m·fRF ± n·fLO (spurious responses)
- IF = |fRF − fLO| (desired downconversion)
- Single-balanced vs Double-balanced vs Triple-balanced
- Image frequency: f_image = fLO + IF
- Conversion loss, LO-to-RF isolation
🔄 Mixer Diagram
🎯 Design Guidelines
- Use spur chart to identify problematic m/n products
- Double-balanced mixer: suppresses even-order spurs
- High LO drive level improves conversion loss and IP3
- Use image-reject filter before mixer input
- Select IF away from strong spur crossings
🔧 Improvements
- Image rejection mixer (IRM): Hartley or Weaver topology
- Sub-harmonic mixer for mmWave (LO at f/2)
- Direct-conversion (zero-IF) avoids image problem
- Digital spur cancellation in baseband
Test Equipment (Part 1)
07
Standard Test Equipment (1) — Spectrum Analyzer & RF Signal Generators
💡 Key Concepts
- Spectrum analyzer: frequency-domain power display
- Resolution Bandwidth (RBW) and Video Bandwidth (VBW)
- Noise floor: DANL (Displayed Average Noise Level)
- Span, center frequency, sweep time settings
- Signal generator: CW, swept, modulated output
- Output flatness, phase noise, harmonics spec
📊 Spectrum Display
🎯 Design Guidelines
- Set RBW 1/100 of span for good resolution
- Use VBW ≤ RBW to smooth noisy signals
- Set ref level just above strongest expected signal
- Use max hold to capture intermittent signals
- Always check input attenuation — overload ruins measurements
🔧 Measurement Tips
- Warm up equipment ≥30 min before precision measurements
- Use external calibrated attenuator to extend input range
- Enable preamplifier for low-signal sensitivity
- Normalize signal generator output for flatness compensation
Distributed Systems & Impedance
08
Distributed Systems and Impedance Matching Techniques (1) — Transmission Lines
💡 Key Concepts
- Transmission line: voltage & current waves travelling along conductor
- Characteristic impedance Z₀ = √(L’/C’)
- Reflection coefficient Γ = (ZL−Z₀)/(ZL+Z₀)
- VSWR = (1+|Γ|)/(1−|Γ|)
- Standing wave pattern — maxima and minima
- Quarter-wave transformer for impedance matching
📐 Key Formulas
Characteristic Impedance
Z₀ = √(L’/C’) = 50 Ω (standard)Reflection Coefficient
Γ = (ZL − Z₀) / (ZL + Z₀)Return Loss (dB)
RL = -20·log₁₀|Γ|
🗺 Smith Chart Concept
🎯 Design Guidelines
- Match all interfaces to 50 Ω for maximum power transfer
- VSWR < 1.5:1 is acceptable in most systems
- Use λ/4 transformer for narrow-band impedance matching
- Via placement critical — keep return current paths short
🔧 Implementation
- Microstrip: easy to fabricate, dominant planar technology
- Calculate trace width for target Z₀ using PCB calculators
- Stripline offers better shielding vs microstrip
- Use electromagnetic simulation for critical traces
09
Distributed Systems and Impedance Matching Techniques (2) — Matching Networks
💡 Key Concepts
- L, T, π matching networks for impedance transformation
- Single-stub tuning using Smith chart
- Double-stub tuning for wider bandwidth
- Balun: balanced to unbalanced transformer
- Broadband matching: multi-section Chebyshev transformer
📐 L-Network
🎯 Design Guidelines
- Q factor of L-network determines bandwidth limitation
- Use π or T networks for higher Q or wider band
- For broadband: cascaded stepped-impedance sections
- Always verify match with VNA after fabrication
🔧 Implementation
- Use impedance matching simulation tools (ADS, Qucs)
- Realize L/C with microstrip stubs at high frequencies
- Measure S11 with VNA; target |S11| < −15 dB
- PCB tolerance sensitivity analysis: check match vs component variation
Passive RF Devices
10
Passive RF Devices and Basic Building Blocks
💡 Key Concepts
- Attenuators: fixed, step, electronically controlled
- Directional couplers: sample forward/reverse power
- Power dividers (Wilkinson): equal split with isolation
- Filters: LPF, HPF, BPF, BSF — Butterworth, Chebyshev
- Phase shifters: fixed and electronically tunable
- Circulators and isolators: non-reciprocal devices
🏗 Wilkinson Divider
🎯 Design Guidelines
- Choose filter response type (Butterworth=flat, Chebyshev=steeper roll-off)
- Directional coupler coupling factor: 10–30 dB typical
- Circulator: use for diplexing TX/RX on single antenna
- Attenuator before sensitive inputs prevents overload
🔧 Improvements
- MEMS filters: high Q, tunable, low loss at mmWave
- BAW/SAW filters for mobile handsets — compact size
- Substrate Integrated Waveguide (SIW) for low-loss passive devices
- 3D-printed RF structures for rapid prototyping
Test Equipment (Part 2)
11
Standard Test Equipment (2) — Network Analysis, Power Meters, Cable & Connector Care
💡 Key Concepts
- Vector Network Analyzer (VNA): measures S-parameters
- S11 = input reflection, S21 = forward transmission
- Calibration SOLT: Short, Open, Load, Thru
- Power meter: accurate absolute power readings
- Connector care: torque wrench, inspection, cleaning
- SMA, 2.92mm (K), 2.4mm, 1.85mm connector families
📊 S-Parameter Matrix
2-Port S-Matrix
[b₁] [S11 S12] [a₁][b₂] = [S21 S22] [a₂]
S11: Input return loss
S21: Forward gain/loss
S12: Reverse isolation
S22: Output match
🎯 VNA Best Practices
- Always calibrate at the measurement reference plane
- Use phase-stable cables rated to calibration frequency
- Apply proper torque to SMA connectors (5 in-lb)
- Visually inspect connectors before every measurement
- Time-domain gating isolates specific reflections
🔧 Implementation
- Use port extension to shift ref plane past fixture
- Multiport VNA for antenna array characterization
- On-wafer probing for MMIC characterization at wafer level
- Include connector loss in de-embedding procedure
Signal Sources & Phase Noise
12
Signal Sources, PLL Synthesizers and Phase Noise
💡 Key Concepts
- Phase-Locked Loop (PLL): feedback frequency control
- VCO: voltage-controlled oscillator K_vco (Hz/V)
- Phase noise: L(f) in dBc/Hz at offset frequency
- Leeson’s model: 1/f³, 1/f², flat noise regions
- Reference oscillator, frequency divider N, loop filter
- Fractional-N PLL for fine frequency resolution
🔄 PLL Block Diagram
🎯 Design Guidelines
- Loop bandwidth controls phase noise: inside BW = ref noise, outside = VCO noise
- Optimal loop BW = crossover of ref & VCO noise curves
- Use low-phase-noise reference crystal oscillator (TCXO/OCXO)
- High Q resonator in VCO improves close-in phase noise
🔧 Improvements
- Two-point modulation for low phase noise wideband FM
- Sub-sampling PLL eliminates divider noise
- Digital PLL (ADPLL) enables fine frequency resolution
- Spread-spectrum modulation to reduce EMI from clock
Digital Wireless Communications
13
Digital Wireless Communications and Vector Signal Analysis (1)
💡 Key Concepts
- Digital modulations: BPSK, QPSK, 16-QAM, 64-QAM, 256-QAM
- IQ (In-phase/Quadrature) representation
- Constellation diagram: amplitude + phase encoded
- Error Vector Magnitude (EVM): quality metric
- Bandwidth efficiency: bits/sec/Hz
- OFDM: orthogonal subcarriers — LTE, WiFi, 5G
📊 QAM Constellation
🎯 Design Guidelines
- Higher-order QAM (256-QAM) requires better SNR and EVM
- EVM < −30 dBc required for 64-QAM operation
- IQ imbalance causes constellation rotation and spreading
- Phase noise broadens constellation points — limit close-in noise
🔧 Implementation
- Use VSA software (89600) for constellation analysis
- Apply digital pre-distortion (DPD) in transmitter
- Implement IQ calibration to fix gain/phase imbalance
- Select modulation order based on link budget SNR
14
Digital Wireless Communications and Vector Signal Analysis (2) — OFDM & Link Budget
💡 Key Concepts
- OFDM: inverse FFT creates orthogonal subcarriers
- Cyclic prefix (CP) guards against multipath ISI
- PAPR: peak-to-average power ratio (challenge for PA)
- Link budget: TX power, path loss, antenna gain, SNR
- Friis transmission equation: free-space path loss
📐 Link Budget
Received Power
P_rx = P_tx + G_tx − FSPL + G_rxFree-Space Path Loss
FSPL = 20·log(d) + 20·log(f) + 20·log(4π/c)Link Margin
LM = P_rx − (NF + kTB + SNR_req)
🎯 Design Guidelines
- Close link budget before hardware build — saves redesign cost
- PAPR of OFDM requires PA with 8–12 dB back-off
- Use subcarrier spacing matched to Doppler spread
- Schedule wider CP for high delay-spread environments
🔧 Improvements
- Crest Factor Reduction (CFR) to manage PAPR in OFDM
- Massive MIMO beamforming: compensates path loss
- Channel estimation: pilot symbols for phase correction
- Adaptive modulation: switch QAM order with channel conditions
RF Sampling & ADCs
15
RF and IF Sampling by RF ADCs (1) — Nyquist & Aliasing
💡 Key Concepts
- Nyquist theorem: f_s ≥ 2·f_max (baseband)
- Bandpass sampling: alias into 1st Nyquist zone intentionally
- ENOB: effective number of bits (SNR/noise performance)
- SFDR, SINAD, THD for ADC quality metrics
- Clock jitter degrades SNR at high frequencies
📐 Sampling Theory
Nyquist Criterion
f_s ≥ 2 · f_maxADC SNR (ideal N-bit)
SNR = 6.02·N + 1.76 dBENOB from SINAD
ENOB = (SINAD − 1.76) / 6.02
🎯 Design Guidelines
- Bandpass sample RF signals to eliminate downconverter hardware
- Use anti-aliasing filter with flat group delay before ADC
- Clock jitter budget: σ_jitter < 1/(2π·f·SNR_dB)
- Drive ADC input at optimal power level — check data sheet
🔧 Improvements
- Interleaved ADC arrays for higher effective sample rate
- Delta-sigma ADC: high resolution for narrowband signals
- Time interleaving correction DSP: compensate offset/gain/timing errors
- RF-class ADCs: 12–16 GS/s sample rate (TI ADC12DJ5200RF)
16
RF and IF Sampling by RF ADCs (2) — Direct RF Digitization
💡 Key Concepts
- GSPS ADCs directly sample GHz-range signals
- Digital downconversion (DDC) on FPGA/ASIC
- Decimation filtering: reduce sample rate after DDC
- Multi-band reception with single converter chip
- RF-to-bits software-defined radio (SDR) architecture
🏗 Direct RF Architecture
🎯 Design Guidelines
- RF ADC SNR degrades 20 dB/decade with input frequency
- External balun to drive differential ADC input
- Low-jitter clock distribution critical (<50 fs)
- DDC NCO frequency plan: avoid DC offsets and LO leakage
🔧 Improvements
- Dithering: add small noise to break ADC nonlinearity patterns
- Calibrate ADC spur tones with LUT-based correction
- Polyphase filter banks for simultaneous multi-band tuning
- RFSoC: RF ADC/DAC + FPGA in single chip (Xilinx)
System Architectures
17
Transmitter and Receiver System Architectures
💡 Key Concepts
- Superheterodyne: classic IF-based architecture
- Direct conversion (zero-IF): no IF stage, I/Q demodulation
- Low-IF architecture: small non-zero IF for image rejection
- Wideband receiver: direct RF sampling approach
- PA efficiency: Class A, AB, D, E, F topologies
- Duplexer/diplexer for simultaneous TX/RX
🏗 Architecture Comparison
Superhet Image Rej.
90%
Direct Conv. Simplicity
High
Direct RF DR
Evolving
Zero-IF DC Offset
Problem
🎯 Design Guidelines
- Superheterodyne: best selectivity, more complex hardware
- Direct conversion: excellent for IC integration (cellular chips)
- Always plan for DC offset calibration in zero-IF designs
- PA back-off tradeoff: efficiency vs. linearity (EER/ET solutions)
- Duplexer isolation: ≥50 dB to protect LNA from TX power
🔧 Improvements
- Configurable RF front-end chips (e.g., Qualcomm RF360)
- Envelope tracking PA: 3–5 dB efficiency gain
- Digital self-interference cancellation for full-duplex
- Cognitive radio: sense and adapt to spectrum dynamically
Antenna & Wireless Channel
18
Antenna Concepts and the Wireless Channel
💡 Key Concepts
- Antenna gain, directivity, efficiency
- Radiation pattern: main lobe, side lobes, null
- Dipole, patch, horn, Yagi, phased array
- Polarization: linear, circular, elliptical
- Wireless channel: fading, multipath, Doppler
- MIMO: multiple input/output spatial multiplexing
📡 Radiation Pattern
🎯 Design Guidelines
- Match antenna impedance to 50 Ω (S11 < −10 dB minimum)
- Half-wave dipole: 2.15 dBi gain, omnidirectional
- MIMO requires spatial separation ≥ λ/2 between elements
- Ground plane size affects radiation pattern of patch antenna
- SAR compliance: check near-body radiation levels
🔧 Improvements
- Beam-forming arrays: digital/analog beamforming for 5G
- Reconfigurable antennas: tune resonant frequency electronically
- Metasurface antennas: intelligent reflecting surfaces (IRS)
- ML-based channel estimation for massive MIMO
Millimetre Wave Engineering
19
Moving Up to Millimetre Waves (mmWave)
💡 Key Concepts
- mmWave: 30–300 GHz (wavelength 1–10 mm)
- High path loss: rain, atmospheric, and oxygen absorption
- High bandwidth: multi-GHz channels available
- 5G NR FR2: 24.25–52.6 GHz bands
- 60 GHz WiGig (802.11ad/ay): 7 GHz unlicensed band
- Challenges: skin effect, substrate loss, packaging
📊 mmWave Atmospheric Absorption
🎯 Design Guidelines
- Use 60 GHz for short-range, high-bandwidth: indoor only
- Package parasitics dominate — use flip-chip or WLP packaging
- Substrate: low-loss Si, GaAs, InP, SiGe BiCMOS at mmWave
- Avoid oxygen absorption window (60 GHz) for long links
- Beam-steering arrays are essential to overcome path loss
🔧 Improvements
- Phased-array-in-package (AiP): compact 5G modules
- On-chip antenna integration in SiGe/CMOS at 60 GHz
- GaN-on-SiC for high-power mmWave PA (radar, satellite)
- Sub-THz (100–300 GHz): future 6G research frontier
Capstone Project
20
Concluding Exercise — Complete Receiver System Design
🏆 End-to-End Receiver Design Process
💡 Design Checklist
- ✅ Define frequency band, sensitivity, and dynamic range
- ✅ Complete cascade NF and IP3 budget spreadsheet
- ✅ Select RF architecture (superhet / direct conversion)
- ✅ Choose all active components (LNA, Mixer, VGA, ADC)
- ✅ Design impedance matching networks at each interface
- ✅ Lay out PCB with proper RF grounding and shielding
- ✅ Simulate S-parameters and noise figure
- ✅ Measure NF, P1dB, IIP3 with lab instruments
🎯 Performance Targets
Noise Figure
<3 dB
IIP3
−5 dBm
SFDR
70 dB
Return Loss S11
<−15 dB
Gain
30–40 dB